How to Get Ps2 to Read Ps2 Games

Overview of the technical specifications of the PlayStation 2

An SCPH-10000 motherboard

An SCPH-30001 motherboard

An SCPH-39001 Motherboard

An SCPH-70001 motherboard

An SCPH-79001 motherboard

The PlayStation 2 technical specifications describe the various components of the PlayStation ii (PS2) video game panel.

Overview [edit]

The 6th-generation hardware of the PlayStation 2 video game console consists of various components. At the eye of the console'due south configuration is its cardinal processing unit (CPU), a custom RISC processor known as the Emotion Engine which operates at 294 MHz (299 MHz in after consoles). The CPU heavily relies on its integration with two vector processing units, known every bit VPU0 and VPU1, the Graphics Synthesizer, and a floating-point unit (FPU) in order to return 3D graphics. Other components, such as the system's DVD-ROM optical drive and DualShock 2 controller, provide the software and user control input.

PlayStation 2 software is distributed on CD-ROM and DVD-ROM. In addition, the console tin can play audio CDs and DVD movies, and is backwards compatible with original PlayStation games. This is accomplished through the inclusion of the original PlayStation's CPU which also serves every bit the PS2's I/O processor.^[1] The PS2 too supports limited functionality with the original PlayStation memory cards and controllers. The PS2'due south DualShock two controller is an upgraded version of the PlayStation'south DualShock with analog face, shoulder and D-pad buttons replacing the digital buttons of the original.^[ii] Similar its predecessor, the DualShock two controller features force feedback technology.

The standard PlayStation ii memory card has an 8 MB capacity and uses Sony'due south MagicGate encryption. This requirement prevented the product of retentiveness cards by 3rd parties who did not purchase a MagicGate license. Memory cards without encryption can be used to shop PlayStation game saves, but PlayStation games would be unable to read from or write to the carte du jour – such a card could only be used as a backup. There are a variety of not-Sony manufactured retentiveness cards bachelor for the PlayStation 2, allowing for a larger retentivity capacity than the standard 8 MB. However their use is unsupported and compatibility is not guaranteed. These retention cards can take up to 128 MB storage infinite.

The console likewise features USB and IEEE 1394 expansion ports. Compatibility with USB and IEEE 1394 devices is dependent on the software supporting the device. For case, the PS2 BIOS will non boot an ISO image from a USB flash drive or operate a USB printer, every bit the machine'due south operating system does non include this functionality. Past contrast, Gran Turismo 4 and Tourist Trophy are programmed to save screenshots to a USB mass storage device and print images on certain USB printers. A PlayStation 2 HDD can be installed via the expansion bay in the back of the panel, and was required to play certain games, notably the pop Final Fantasy XI.^[three]

Central processing unit [edit]

Emotion Engine CPU as institute in the SCPH-7000x

The combined EE+GS+RDRAM+DRAM found in the SCPH-7900x and SCPH-9000x series

The ASIC from the SCPH-90001 (CXD2976GB) shaven downwards to show the EE+GS+RDRAM+DRAM silicon

• CPU: MIPS Three R5900-based "Emotion Engine", clocked at 294.912 MHz (299 MHz on newer versions), with 128-fleck SIMD capabilities^{[4] [5]}
• 250-nm CMOS manufacturing (ending with 65-nm CMOS), thirteen.five million transistors, 225 mm² dice size,^[six] fifteen West dissipation (combined EE+GS in SCPH-7500x and later SCPH-7000x): 86 mm², 53.five 1000000 transistors)^[7] (combined EE+GS+RDRAM+DRAM in SCPH-7900x ended with 65 nm CMOS design)^[eight]
  • CPU core: MIPS R5900 (COP0), 64-bit, trivial endian (mipsel). CPU is a superscalar, in-order execution 2-upshot design with 6-phase long integer pipelines, 32 32-bit GPR registers, 32 128-bit SIMD linear scalar registers, two 64-bit integer ALUs, 128-bit load-store unit (LSU) and a branch execution unit (BXU).
  • Instruction set: MIPS III, MIPS 4 subset with Sony's proprietary 107 vector SIMD multimedia instructions (MMI). The custom instruction set was implemented past grouping the two 64-bit integer ALUs.
    • 32-fleck FPU coprocessor (COP1) with half-dozen-phase long pipeline (floating betoken multiply accumulator × 1, floating point divider × 1). FPU is not IEEE compliant.
  • 2 32-bit VLIW-SIMD vector units at 294.912 MHz: VPU0 and VPU1 (floating signal multiply accumulator × 9, floating point divider × 1) each VPU contains a vector unit (VU), instruction cache, data cache and interface unit. Each vector unit also has upper execution unit of measurement containing 4 × FMAC and lower execution unit containing FDIV, integer ALU, load-store unit, co-operative logic, xvi 16-bit integer registers and 32 128-bit floating point registers. VPU1 has an additional EFU unit.
    • VPU0 (COP2; FMAC × 4, FDIV × one) is tightly coupled with the main CPU and is typically used for polygon and geometry transformations (under parallel or series connectedness), physics and other gameplay related tasks
    • VPU1 (Elementary Functional Unit, EFU; FMAC × 5, FDIV × 2) operates independently controlled by microcode, parallel to the CPU cadre, is typically used for polygon and geometry transformations, clipping, culling, lighting and other visual based calculations (texture matrix able for ii coordinates (UV/ST))^[9]
      • Parallel: results of VU0/FPU sent equally another display list via MFIFO (for east.chiliad. circuitous characters/vehicles/etc.)
      • Series: results of VU0/FPU sent to VU1 (via 3 methods) and tin can deed as an optional geometry pre-processor that does all base piece of work to update the scene every frame (for e.one thousand. camera, perspective, boning and laws of movement such equally animations or physics)^[ten]
  • Image Processing Unit of measurement (IPU): MPEG-2 compressed image macroblock layer decoder allowing playback of DVDs and game FMV. It likewise allowed vector quantization for 2D graphics information.^[11]
  • Memory management unit (MMU),^[12] RDRAM controller and DMA controller: handle memory admission within the arrangement
  • Cache memory: sixteen KB instruction cache, eight KB + sixteen KB scratchpad (ScrP) information cache
  • Scratchpad (SPR) is extended area of memory visible to the EE CPU. This extended memory provides 16 kilobytes of fast RAM available to exist used by the awarding. Scratchpad memory tin be used to store temporary information that is waiting to exist sent via DMA or for any other temporary storage that the programmer can define.

Interfaces [edit]

• I/O processor interconnection: remote procedure phone call over a series link, DMA controller for bulk transfer
• Master RDRAM memory bus. Bandwidth: 3.2 GB/southward
• Graphics interface (GIF), DMA channel that connects the EE CPU to the GS co-processor. To draw something to the screen, one must send render commands to the GS via the GIF channel: 64-bit, 150 MHz bus, maximum theoretical bandwidth of 1.2 GB/southward.^[6]
• Display lists generated by CPU/VPU0 and VPU1 are sent to the GIF, which prioritizes them earlier dispatching them to the Graphics Synthesizer for rendering.
• Vector Unit of measurement Interface (VIF), consists of two DMA channels VIF0 for VPU0 and VIF1 for VPU1. Vector units and the main CPU communicate via VIF DMA channels.
• SIF – Serial Interface or Subsystem Interface which consists of 3 DMA channels:
• Subsystem Interface 0 (SIF0) and Subsystem Interface i (SIF1), used for communication between the EE main CPU and IOP co-processor. These are series DMA channels where both CPUs can transport commands and institute advice through an RPC protocol.
• Subsystem Interface 2 (SIF2), used for backwards compatibility with PS1 games and debugging.

Operation [edit]

• Floating point performance: 6.2 GFLOPS (single precision 32-bit floating point)
  • FPU 0.64 GFLOPS
  • VU0 2.44 GFLOPS^{[xiii] [14]}
  • VU1 three.08 GFLOPS (Including internal 0.64 GFLOPS EFU)
• Tri-strip geometric transformation (VU0+VU1): 150 one thousand thousand vertices per second^[15]
  • 3D CG geometric transformation with raw 3D perspective operations (VU0+VU1): 66–80+ 1000000 vertices per 2d^[nine]
  • 3D CG geometric transformations at peak bones/movements/furnishings (textures)/lights (VU0+VU1, parallel or series): xv–twenty meg vertices per second^[15]
  • Lighting: 38 1000000 polygons/second
  • Fog: 36 one thousand thousand polygons/2d
  • Curved surface generation (Bezier): 16 million polygons/2d
  • Image processing performance: 150 meg pixels/second
  • Actual existent-world polygons (per frame): 500–650k at thirtyFPS, 250–325k at sixtyFPS
• Instructions per second: 6,000 MIPS (million instructions per second)^[xvi]

Organization memory [edit]

• Main retentivity: 32 MB PC800 32-chip dual-channel (2x sixteen-bit) RDRAM (Directly Rambus DRAM) @ 400 MHz, three.2 GB/s peak bandwidth^[6]

Graphics processing unit of measurement [edit]

• Parallel rendering processor with embedded DRAM "Graphics Synthesizer" (GS) clocked at 147.456 MHz
• 279 mm² die (combined EE+GS in SCPH-7500x: 86 mm², 53.5 one thousand thousand transistors)
• Programmable CRT controller (PCRTC) for output
• Pixel pipelines: 16 without whatever texture mapping units (TMU), still one-half of pixel pipelines can perform texturing, so fillrate is either 16 pixels per clock with untextured 2400 Mpixels; or eight pixels per clock with 1200 megapixels with bilinear texturing, and 1200 megatexels (bilinear).
• Video output resolution: Variable from 256×224 to 1920×1080^[17]
• four MB of embedded DRAM as video memory (an additional 32 MB of main memory can be used as video memory for off-screen textures); 48 gigabytes per 2d acme bandwidth
  • Texture buffer bandwidth: nine.6 GB/s
  • Frame buffer bandwidth: 38.4 GB/s
• eDRAM autobus width: 2560-fleck (composed of three independent buses: 1024-bit write, 1024-bit read, 512-bit read/write)
• Pixel configuration: RGB:alpha, 24:8, 15:1; xvi-, 24-, or 32-bit Z-buffer
• Brandish color depth: 32-bit (RGBA: viii bits each)
• Dedicated connectedness to master CPU and VU1
• Overall pixel fillrate: 16 × 147Mpix/s = 2.352 gigapixel/due south
  • ane.2 gigapixel/south (with Z-buffer, blastoff, and texture)
  • With no texture, flat shaded: 2.fourGpix/s (75,000,000 32-pixel raster triangles)
  • With 1 total texture (diffuse map), Gouraud shaded: 1.2Gpix/southward (37,750,000 32-flake pixel raster triangles)
  • With 2 full textures (lengthened map and specular, alpha, or other), Gouraud shaded: 0.viGpix/southward (18,750,000 32-bit pixel raster triangles)
  • Texture fillrate: one.2 Gtexel/s
  • Sprite cartoon rate: 18.75 meg/south (8×8 pixels)
  • Particle cartoon rate: 150 million/s
• Polygon drawing rate: 75 1000000/due south (small polygon)
  • 50 million/s (48-pixel quad with Z and A)
  • 30 million/s (50-pixel triangle with Z and A)
  • 25 million/due south (48-pixel quad with Z, A and T)
  • sixteen meg/s (75-pixel triangle with Z, A, T and fog)^[eighteen]
• VESA (maximum 1280×1024 pixels)
• three rendering paths (path 1, 2 and 3)

  

  Graphics Synthesizer as plant in SCPH-390xx

  GS furnishings include: Dot3 crash-land mapping (normal mapping),^[xix], mipmapping, spherical harmonic lighting,^[20] alpha blending, blastoff test, destination alpha test, depth test, scissor test, transparency effects, framebuffer effects, mail-processing effects, perspective-correct texture mapping, edge-AAx2 (poly sorting required),^[9] bilinear, trilinear texture filtering, multi-pass, palletizing (6:i ratio iv-bit; 3:ane ratio 8-bit), offscreen drawing, framebuffer mask, flat shading, Gouraud shading, cel shading, dithering, texture swizzling.
• Multi-laissez passer rendering ability
  • Four passes: 300 Mpixel/s (300 Mpixels/due south divided by 32 pixels = 9,375,000 triangles/s lost every four passes)^[21]

Audio [edit]

• Audio: "SPU1+SPU2" (SPU1 is actually the CPU clocked at 8 MHz and SPU2 is PS1 SPU)
  • Sound Memory: 2 MB
  • Number of voices: 48 hardware channels of ADPCM on SPU2 plus software-mixed definable, programmable channels
  • Sampling Frequency: 44.1 kHz or 48 kHz (selectable)
  • PCM audio source
  • Digital effects include:
    • Pitch Modulation
    • Envelope
    • Looping
    • Digital Reverb
  • Load up to 512K of sampled waveforms
  • Supports MIDI Instruments
  • Output: Dolby Digital 5.one Surround audio, DTS (Full move video only), later games achieved matrix encoded 5.1 environment during gameplay through Dolby Pro Logic II

I/O processor (IOP) [edit]

• Input Output Processor (IOP)
  • I/O Memory: 2 MB EDO DRAM
  • CPU Core: Original PlayStation CPU (MIPS R3000A clocked at 33.8688 MHz or 37.5 MHz+PS1 GTE and MDEC for backwards compatibility with PS1 games)
  • Automatically underclocked to 33.8688 MHz to reach hardware backwards compatibility with original PlayStation format games.
  • Sub Bus: 32-bit
  • Connexion to: SPU and CD/DVD controller.

Replaced with PowerPC-based "Deckard" IOP with four MB SDRAM starting with SCPH-7500x.

Connectivity [edit]

• 2 proprietary PlayStation controller ports (250 kHz clock for PS1 and 500 kHz for PS2 controllers)
• 2 proprietary Memory Card slots using MagicGate encryption (250 kHz for PS1 cards. Up to two MHz for PS2 cards with an average sequential read/write speed of 130 kbit/due south)
• 2 USB one.1 ports with an OHCI-compatible controller
• AV Multi Out (Composite video, S-Video, RGBS^† (SCART), RGsB (SCART or VGA connector^††), YP_BP_R ^††† (component), and D-Terminal)
• RFU DC Out
• South/PDIF Digital Out
• Expansion Bay for iii.5-inch HDD and Network Adaptor (required for HDD, SCPH-300xx to 500xx only)^[22]
• PC Card slot for Network Adaptor (PC Carte du jour type) and External Hard Disk Bulldoze (SCPH-10000, SCPH-15000, SCPH-18000 models)^[23]
• Emotion Engine (EE) includes an on-chip Series I/O port(SIO) used internally past the EE'due south kernel to output debugging and messages and to start the kernel debugger.
• Ethernet port (Slim only)
• i.LINK (besides known as FireWire) (SCPH-10000 to 3900x only)^[24]
• Infrared remote control port (SCPH-500xx and newer)^[25]

^† Standard RGB style simply allows interlaced modes up to 480i(NTSC) and 576i(PAL) and progressive up to 240p. A display or adapter capable of Sync-on-greenish (RGsB) is necessary for higher modes. Furthermore, the PS2's Macrovision re-create protection isn't compatible with either RGB style, thus DVDs cannot be played with RGB. Motherboard modifications take been known to bypass both problems.
^†† VGA connector is only available for progressive-browse supporting games, homebrew-enabled systems, and Linux for PlayStation 2, and requires a monitor that supports RGsB, or "sync on green," signals.
^††† Contrary to pop belief, the PS2'due south YP_BP_R/component output fully supports 240p and games from the original PlayStation. However, 240p output isn't part of the YP_BP_R standard, thus not all HDTVs support information technology. Upscaling can be used as a workaround.

Optical disc bulldoze [edit]

• Disc Bulldoze blazon: proprietary interface through a custom micro-controller + DSP chip. 24x speed CD-ROM [3.6 MB/s], 4x speed DVD-ROM [v.28 MB/s] — region-locked with copy protection.
• Supported Disc Media: PlayStation 2 format CD-ROM, PlayStation format CD-ROM, CD-DA, PlayStation 2 format DVD-ROM, DVD Video. DVD5 (Unmarried-layer, 4.seven GB) and DVD9 (Dual-layer, 8.five GB) supported. Afterward models starting with SCPH-500xx are DVD+RW and DVD-RW compatible.

See also [edit]

• PlayStation technical specifications
• PlayStation three technical specifications
• PlayStation iv technical specifications

References [edit]

1. ^ Stuart, Keith (12 Dec 2013). "PS4 and Xbox I: then why aren't they backwards compatible?". the Guardian. Archived from the original on 14 June 2015.
2. ^ "Dual Shock 2 Review". IGN. September 27, 2001. Archived from the original on 2011-05-15. Retrieved February seven, 2011. The biggest divergence betwixt the Dual Shock 2 and the original… all of the buttons and fifty-fifty the digital pad offer analog back up. This means that the d-pad, the four face buttons and the four shift buttons are all pressure-sensitive and accept 255 degrees of sensitivity. It is also worth noting that the Dual Shock 2 is a bit lighter than the original Dual Daze because it appears to have less in the way of gears for the vibration function of the controller.
3. ^ "Final Fantasy 11 Review for PlayStation 2 – GameSpot". Uk.gamespot.com. March 23, 2004. Archived from the original on July 21, 2011. Retrieved November eleven, 2010.
4. ^ John L. Hennessy and David A. Patterson. "Reckoner Architecture: A Quantitative Arroyo, Tertiary Edition". ISBN one-55860-724-ii
5. ^ Keith Diefendorff. "Sony'south Emotionally Charged Chip". Microprocessor Report, Book 13, Number 5, April 19, 1999. Microdesign Resources.
6. ^ ^{a b c} Hennessy, John L.; Patterson, David A. (29 May 2002). Estimator Architecture: A Quantitative Arroyo (three ed.). Morgan Kaufmann. ISBN978-0-08-050252-6 . Retrieved 9 April 2013.
7. ^ https://www.sie.com/content/dam/corporate/en/corporate/release/pdf/030421be.pdf
8. ^ "ソニー、65nm対応の半導体設備を導入。3年間で2,000億円の投資". pc.watch.impress.co.jp. Archived from the original on 2016-08-13.
9. ^ ^{a b c} "Tapping into the power of PS2" (PDF). Archived from the original (PDF) on July 20, 2011. Retrieved November 11, 2010.
10. ^ "Emotion". Kim L. Vu. Archived from the original on 14 June 2012. Retrieved 7 July 2011.
11. ^ "Aaron D Lanterman" (PDF). users.ece.gatech.edu. Archived (PDF) from the original on 2014-10-24.
12. ^ "Archived copy" (PDF). Archived (PDF) from the original on 2016-09-nineteen. Retrieved 2016-02-07 . {{cite web}}: CS1 maint: archived re-create as title (link)
13. ^ "Vector Unit Compages for Emotion Synthesis". Archived from the original on May 10, 2018. Retrieved April 26, 2017.
14. ^ "Designing and Programming the Emotion Engine" (PDF). Archived (PDF) from the original on April 28, 2017. Retrieved April 26, 2017.
15. ^ ^{a b} "Within the Playstation two". philvaz.com. Archived from the original on March 4, 2011. Retrieved July ane, 2011.
16. ^ "Archived copy". Archived from the original on 2014-10-06. Retrieved 2014-09-30 . {{cite spider web}}: CS1 maint: archived copy as title (link)
17. ^ "GS Fashion Selector: Development & Feedback". psx-scene.com. Archived from the original on 2014-12-03.
18. ^ GS User's Manual, Sony Computer Entertainment, 2001
19. ^ "Archived re-create" (PDF). Archived (PDF) from the original on 2015-05-xvi. Retrieved 2016-01-25 . {{cite web}}: CS1 maint: archived copy as title (link)
20. ^ "Practical Implementation of SH Lighting and HDR Rendering". slidegur.com. Archived from the original on 2016-10-09.
21. ^ "PS2 Programming Optimisations" (PDF). Archived from the original (PDF) on July 20, 2011. Retrieved November 11, 2010.
22. ^ "Model numbers for PlayStation 2 and PS2 accessories". Archived from the original on 2010-03-xvi.
23. ^ "Model numbers for PlayStation 2 and PS2 accessories". Archived from the original on 2010-03-16.
24. ^ "PlayStation ii SCPH-39001 Instruction manual". Archived from the original on 2013-12-sixteen. Retrieved 2013-12-xvi .
25. ^ "SCEI Launches PlayStation 2 New Model SCPH-50000" (PDF). Archived from the original (PDF) on 2014-10-27. Retrieved 2013-12-16 .

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Source: https://en.wikipedia.org/wiki/PlayStation_2_technical_specifications

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